Output Voting
For the commanded output data to digital and analog output modules, the application does this:
Redundant Configuration | Description | ||
Dual Processors | The output modules processing the integrated
circuit (FPGA) disregard discrepant data from the processors and the outputs hold
(freeze) at their last state. | ||
Triple Processors | When only two of the three sets of data agree, the
2oo3 data is used and the third set is discarded. When all three sets of data
disagree, the FPGAs discard all data and the outputs hold (freeze) at their last
state. |
TIP:
Frozen outputs are only tolerated for the PST period.
When the PST expires and no valid data is received, the outputs enter the shutdown state
defined in the application.
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